Chung2015
From ACES
| Chung2015 | |
|---|---|
| entry | article |
| address | |
| annote | |
| author | S. Chung and J. Kong and F. Koushanfar |
| booktitle | |
| chapter | |
| edition | |
| editor | |
| howpublished | |
| institution | |
| journal | IEEE Transactions on Computers |
| month | 8 |
| note | |
| number | |
| organization | |
| pages | |
| publisher | |
| school | |
| series | |
| title | An Energy-efficient Last-level Cache Architecture for Process Variation-tolerant 3D Microprocessors |
| type | |
| volume | 64 |
| year | 2015 |
| doi | 10.1109/TC.2014.2378291 |
| issn | |
| isbn | |
| url | http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6977972 |
| Chung2015.pdf | |
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Electrical & Computer Engineering
University of California, San Diego
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Electrical & Computer Engineering
University of California, San Diego
9500 Gilman Drive, MC 0407
Jacobs Hall, Room 6401
La Jolla, CA 92093-0407
Lab Location: EBU1-2514
University of California San Diego
9500 Gilman Dr, La Jolla, CA 92093
University of California San Diego
9500 Gilman Dr, La Jolla, CA 92093