Chung2015
From ACES
Chung2015 | |
---|---|
entry | article |
address | |
annote | |
author | S. Chung and J. Kong and F. Koushanfar |
booktitle | |
chapter | |
edition | |
editor | |
howpublished | |
institution | |
journal | IEEE Transactions on Computers |
month | |
note | |
number | |
organization | |
pages | |
publisher | |
school | |
series | |
title | An Energy-efficient Last-level Cache Architecture for Process Variation-tolerant 3D Microprocessors |
type | |
volume | 64 |
year | |
doi | 10.1109/TC.2014.2378291 |
issn | |
isbn | |
url | http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6977972 |