Difference between revisions of "Hussain2018"

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|title=MAXelerator: FPGA Accelerator for Privacy Preserving Multiply-Accumulate (MAC) on Cloud Servers
|title=MAXelerator: FPGA Accelerator for Privacy Preserving Multiply-Accumulate (MAC) on Cloud Servers
|entry=inproceedings
|entry=inproceedings
|pdf=Hussain2018.pdf
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Latest revision as of 17:34, 9 November 2021

Hussain2018
entryinproceedings
addressSan Fransisco
annote
authorSiam U. Hussain and Bita Darvish Rouhani and Mohammad Ghasemzadeh and Farinaz Koushanfar
booktitleDesign Automation Conference (DAC)
chapter
edition
editor
howpublished
institution
journal
month6
note
number
organizationACM
pages
publisherACM
school
series
titleMAXelerator: FPGA Accelerator for Privacy Preserving Multiply-Accumulate (MAC) on Cloud Servers
type
volume
year2018
doi10.1145/3195970.3196074
issn
isbn978-1-4503-5700-5
urlhttps://dl.acm.org/citation.cfm?id=3196074
pdfHussain2018.pdf

File:Hussain2018.pdf

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Email:
farinaz@ucsd.edu
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Address:
Electrical & Computer Engineering
University of California, San Diego
9500 Gilman Drive, MC 0407
Jacobs Hall, Room 6401
La Jolla, CA 92093-0407
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Lab Location: EBU1-2514
University of California San Diego
9500 Gilman Dr, La Jolla, CA 92093