Difference between revisions of "Wei2012hardware"
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|keywords=benchmark, gate-level characterization, Hardware Trojan, process variation | |keywords=benchmark, gate-level characterization, Hardware Trojan, process variation | ||
|abstract=<p>This paper proposes Hardware Trojan (HT) placement techniques that yield challenging HT detection benchmarks. We develop three types of one-gate HT benchmarks based on switching power, leakage power, and delay measurements that are commonly used in HT detection. In particular, we employ an iterative searching algorithm to find rarely switching locations, an aging-based approach to create ultralow power HT, and a backtracking-based reconvergence identification method to determine the non-observable delay paths. The simulation results indicate that our HT attack benchmarks provide the most challenging representative test cases for the evaluation of side-channel based HT detection techniques.</p> | |abstract=<p>This paper proposes Hardware Trojan (HT) placement techniques that yield challenging HT detection benchmarks. We develop three types of one-gate HT benchmarks based on switching power, leakage power, and delay measurements that are commonly used in HT detection. In particular, we employ an iterative searching algorithm to find rarely switching locations, an aging-based approach to create ultralow power HT, and a backtracking-based reconvergence identification method to determine the non-observable delay paths. The simulation results indicate that our HT attack benchmarks provide the most challenging representative test cases for the evaluation of side-channel based HT detection techniques.</p> | ||
|month=6 | |||
|year=2012 | |||
|booktitle=Design Automation Conference (DAC) | |booktitle=Design Automation Conference (DAC) | ||
|title=Hardware Trojan Horse Benchmark via Optimal Creation and Placement of Malicious Circuitry | |title=Hardware Trojan Horse Benchmark via Optimal Creation and Placement of Malicious Circuitry | ||
|entry=inproceedings | |entry=inproceedings | ||
}} | }} | ||
Revision as of 03:39, 4 September 2021
| Wei2012hardware | |
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| author | Sheng Wei and Kai Li and Farinaz Koushanfar and Potkonjak, Miodrag |
| booktitle | Design Automation Conference (DAC) |
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| month | 6 |
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| title | Hardware Trojan Horse Benchmark via Optimal Creation and Placement of Malicious Circuitry |
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| year | 2012 |
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| url | http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6241495 |
Email:
farinaz@ucsd.edu
farinaz@ucsd.edu
Address:
Electrical & Computer Engineering
University of California, San Diego
9500 Gilman Drive, MC 0407
Jacobs Hall, Room 6401
La Jolla, CA 92093-0407
Electrical & Computer Engineering
University of California, San Diego
9500 Gilman Drive, MC 0407
Jacobs Hall, Room 6401
La Jolla, CA 92093-0407
Lab Location: EBU1-2514
University of California San Diego
9500 Gilman Dr, La Jolla, CA 92093
University of California San Diego
9500 Gilman Dr, La Jolla, CA 92093