Difference between revisions of "Majzoobi2010rapid"

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|title=Rapid FPGA Characterization using Clock Synthesis and Signal Sparsity
|title=Rapid FPGA Characterization using Clock Synthesis and Signal Sparsity
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|entry=inproceedings
|pdf=Majzoobi2010rapid.pdf
}}
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Latest revision as of 17:37, 9 November 2021

Majzoobi2010rapid
entryinproceedings
address
annote
authorMehrdad Majzoobi and Eva Dyer and Ahmed Elnably and Farinaz Koushanfar
booktitleInternational Test Conference (ITC)
chapter
edition
editor
howpublished
institution
journal
month11
note
number
organization
pages
publisher
school
series
titleRapid FPGA Characterization using Clock Synthesis and Signal Sparsity
type
volume
year2010
doi
issn
isbn
urlhttp://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5699248
pdfMajzoobi2010rapid.pdf

File:Majzoobi2010rapid.pdf

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Email:
farinaz@ucsd.edu
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Address:
Electrical & Computer Engineering
University of California, San Diego
9500 Gilman Drive, MC 0407
Jacobs Hall, Room 6401
La Jolla, CA 92093-0407
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Lab Location: EBU1-2514
University of California San Diego
9500 Gilman Dr, La Jolla, CA 92093