Difference between revisions of "Demaut2015"
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|keywords=logic design; hardware description, secure computation; automation; optimization | |keywords=logic design; hardware description, secure computation; automation; optimization | ||
|abstract=<p>In the recent years, secure computation has been the subject of intensive research, emerging from theory to practice. In order to make secure computation usable by non-experts, Fairplay (USENIX Security 2004) initiated a line of research in compilers that allow to automatically generate circuits from high-level descriptions of the functionality that is to be computed securely. Most recently, TinyGarble (IEEE S\&P 2015) demonstrated that it is natural to use existing hardware synthesis tools for this task. In this work, we present how to use industrial-grade hardware synthesis tools to generate circuits that are not only optimized for size, but also for depth. These are required for secure computation protocols with non-constant round complexity. We compare a large variety of circuits generated by our toolchain with hand-optimized circuits and show reduction of depth by up to 14\%. The main advantages of our approach are developing customized libraries of depth-optimized circuit constructions which we map to high-level functions and operators, and using existing libraries available in the industrial-grade logic synthesis tools which are heavily tested. In particular, we show how to easily obtain circuits for IEEE 754 compliant floating-point operations. We extend the open-source ABY framework (NDSS 2015) to securely evaluate circuits generated with our toolchain and show between 0.5 to 21.4 times faster floating-point operations than previous protocols of Aliasgari et al. (NDSS 2013), even though our protocols work for two parties instead of three or more. As application we consider privacy-preserving proximity testing on Earth.</p> | |abstract=<p>In the recent years, secure computation has been the subject of intensive research, emerging from theory to practice. In order to make secure computation usable by non-experts, Fairplay (USENIX Security 2004) initiated a line of research in compilers that allow to automatically generate circuits from high-level descriptions of the functionality that is to be computed securely. Most recently, TinyGarble (IEEE S\&P 2015) demonstrated that it is natural to use existing hardware synthesis tools for this task. In this work, we present how to use industrial-grade hardware synthesis tools to generate circuits that are not only optimized for size, but also for depth. These are required for secure computation protocols with non-constant round complexity. We compare a large variety of circuits generated by our toolchain with hand-optimized circuits and show reduction of depth by up to 14\%. The main advantages of our approach are developing customized libraries of depth-optimized circuit constructions which we map to high-level functions and operators, and using existing libraries available in the industrial-grade logic synthesis tools which are heavily tested. In particular, we show how to easily obtain circuits for IEEE 754 compliant floating-point operations. We extend the open-source ABY framework (NDSS 2015) to securely evaluate circuits generated with our toolchain and show between 0.5 to 21.4 times faster floating-point operations than previous protocols of Aliasgari et al. (NDSS 2013), even though our protocols work for two parties instead of three or more. As application we consider privacy-preserving proximity testing on Earth.</p> | ||
|month=8 | |||
|year=2015 | |||
|journal=Proceedings of the 22nd ACM SIGSAC Conference on Computer and Communications Security | |journal=Proceedings of the 22nd ACM SIGSAC Conference on Computer and Communications Security | ||
|title=Automated Synthesis of Optimized Circuits for Secure Computation | |title=Automated Synthesis of Optimized Circuits for Secure Computation | ||
|entry=conference | |entry=conference | ||
}} | }} | ||
Revision as of 04:43, 4 September 2021
| Demaut2015 | |
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| author | Demmler, D. and G. Dessouky and F. Koushanfar and Sadeghi, A. and T. Schneider and S. Zeitouni |
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| journal | Proceedings of the 22nd ACM SIGSAC Conference on Computer and Communications Security |
| month | 8 |
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| title | Automated Synthesis of Optimized Circuits for Secure Computation |
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| year | 2015 |
| doi | 10.1145/2810103.2813678 |
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| url | http://dl.acm.org/citation.cfm?id=2813678 |
Email:
farinaz@ucsd.edu
farinaz@ucsd.edu
Address:
Electrical & Computer Engineering
University of California, San Diego
9500 Gilman Drive, MC 0407
Jacobs Hall, Room 6401
La Jolla, CA 92093-0407
Electrical & Computer Engineering
University of California, San Diego
9500 Gilman Drive, MC 0407
Jacobs Hall, Room 6401
La Jolla, CA 92093-0407
Lab Location: EBU1-2514
University of California San Diego
9500 Gilman Dr, La Jolla, CA 92093
University of California San Diego
9500 Gilman Dr, La Jolla, CA 92093