Difference between revisions of "Mirhoseini2013"

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|doi=10.1109/PerCom.2013.6526735
|doi=10.1109/PerCom.2013.6526735
|abstract=<p><span>We develop Idetic, a set of mechanisms to enable long computations on ultra-low power Application Specific Integrated Circuits (ASICs) with energy harvesting sources. We address the power transiency and unpredictability problem by optimally inserting checkpoints. Idetic targets highlevel synthesis designs and automatically locates and embeds the checkpoints at the register-transfer level. We define an objective function that aims to find the checkpoints which incur minimum overhead and minimize recomputation energy cost. We develop and exploit a dynamic programming technique to solve the optimization problem. For real time operation, Idetic adaptively adjusts the checkpointing rate based on the available energy level in the system. Idetic is deployed and evaluated on cryptographic benchmark circuits. The test platform harvests RF power through an RFID-reader and stores the energy in a 3.3\&mu;F capacitor. For storage of checkpointed data, we evaluate and compare the effectiveness of various non-volatile memories including NAND Flash, PCM, and STTM. Extensive evaluations show that Idetic reliably enables execution of long computations under different source power patterns with low overhead. Our benchmark evaluations demonstrate that the area and energy overheads corresponding to the checkpoints are less than 5\% and 11\% respectively.</span></p>
|abstract=<p><span>We develop Idetic, a set of mechanisms to enable long computations on ultra-low power Application Specific Integrated Circuits (ASICs) with energy harvesting sources. We address the power transiency and unpredictability problem by optimally inserting checkpoints. Idetic targets highlevel synthesis designs and automatically locates and embeds the checkpoints at the register-transfer level. We define an objective function that aims to find the checkpoints which incur minimum overhead and minimize recomputation energy cost. We develop and exploit a dynamic programming technique to solve the optimization problem. For real time operation, Idetic adaptively adjusts the checkpointing rate based on the available energy level in the system. Idetic is deployed and evaluated on cryptographic benchmark circuits. The test platform harvests RF power through an RFID-reader and stores the energy in a 3.3\&mu;F capacitor. For storage of checkpointed data, we evaluate and compare the effectiveness of various non-volatile memories including NAND Flash, PCM, and STTM. Extensive evaluations show that Idetic reliably enables execution of long computations under different source power patterns with low overhead. Our benchmark evaluations demonstrate that the area and energy overheads corresponding to the checkpoints are less than 5\% and 11\% respectively.</span></p>
|month=3
|year=2013
|journal=Pervasive Computing and Communication conference (PerCom)
|journal=Pervasive Computing and Communication conference (PerCom)
|title=Idetic: A High-level Synthesis Approach for Enabling Long Computations on Transiently-powered ASICs
|title=Idetic: A High-level Synthesis Approach for Enabling Long Computations on Transiently-powered ASICs
|entry=conference
|entry=conference
|date=2013-Ma-01
}}
}}

Revision as of 04:40, 4 September 2021

Mirhoseini2013
entryconference
address
annote
authorA. Mirhoseini and E. M. Songhori and F. Koushanfar
booktitle
chapter
edition
editor
howpublished
institution
journalPervasive Computing and Communication conference (PerCom)
month3
note
number
organization
pages
publisher
school
series
titleIdetic: A High-level Synthesis Approach for Enabling Long Computations on Transiently-powered ASICs
type
volume
year2013
doi10.1109/PerCom.2013.6526735
issn
isbn
urlhttp://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6526735
pdf


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Email:
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Address:
Electrical & Computer Engineering
University of California, San Diego
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Lab Location: EBU1-2514
University of California San Diego
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