Difference between revisions of "Alkabani2008trusted"
From ACES
(Import from BibTeX) |
m (Import from BibTeX) |
||
| Line 3: | Line 3: | ||
|abstract=We have developed a methodology for unique identification of integrated circuits (ICs) that addresses untrusted fabrication and other security problems. The new method leverages nondestructive gate-level characterization of ICs post-manufacturing, revealing the hidden and unclonable uniqueness of each IC. The IC characterization uses the externally measured leakage currents for multiple input vectors. We have derived several optimization techniques for gate-level characterization. The probability of collision of IDs in presence of intra- and inter-chip correlations is computed. We also introduce a number of novel security and authentication protocols, such as hardware metering, challenge-based authentication and prevention of software piracy, that leverage the extraction of a unique ID for each IC. Experimental evaluations of the proposed approach on a large set of benchmark examples reveals its effectiveness even in presence of measurement errors. | |abstract=We have developed a methodology for unique identification of integrated circuits (ICs) that addresses untrusted fabrication and other security problems. The new method leverages nondestructive gate-level characterization of ICs post-manufacturing, revealing the hidden and unclonable uniqueness of each IC. The IC characterization uses the externally measured leakage currents for multiple input vectors. We have derived several optimization techniques for gate-level characterization. The probability of collision of IDs in presence of intra- and inter-chip correlations is computed. We also introduce a number of novel security and authentication protocols, such as hardware metering, challenge-based authentication and prevention of software piracy, that leverage the extraction of a unique ID for each IC. Experimental evaluations of the proposed approach on a large set of benchmark examples reveals its effectiveness even in presence of measurement errors. | ||
|pages=102 - 117 | |pages=102 - 117 | ||
|month= | |||
|year=2008 | |||
|booktitle=Information Hiding (IH) | |booktitle=Information Hiding (IH) | ||
|title=Trusted Integrated Circuits: A Nondestructive Hidden Characteristics Extraction Approach | |title=Trusted Integrated Circuits: A Nondestructive Hidden Characteristics Extraction Approach | ||
|entry=inproceedings | |entry=inproceedings | ||
}} | }} | ||
Revision as of 03:34, 4 September 2021
| Alkabani2008trusted | |
|---|---|
| entry | inproceedings |
| address | |
| annote | |
| author | Y. Alkabani and F. Koushanfar and N. Kiyavash and M. Potkonjak |
| booktitle | Information Hiding (IH) |
| chapter | |
| edition | |
| editor | |
| howpublished | |
| institution | |
| journal | |
| month | |
| note | |
| number | |
| organization | |
| pages | 102 - 117 |
| publisher | |
| school | |
| series | |
| title | Trusted Integrated Circuits: A Nondestructive Hidden Characteristics Extraction Approach |
| type | |
| volume | |
| year | 2008 |
| doi | |
| issn | |
| isbn | |
| url | |
Email:
farinaz@ucsd.edu
farinaz@ucsd.edu
Address:
Electrical & Computer Engineering
University of California, San Diego
9500 Gilman Drive, MC 0407
Jacobs Hall, Room 6401
La Jolla, CA 92093-0407
Electrical & Computer Engineering
University of California, San Diego
9500 Gilman Drive, MC 0407
Jacobs Hall, Room 6401
La Jolla, CA 92093-0407
Lab Location: EBU1-2514
University of California San Diego
9500 Gilman Dr, La Jolla, CA 92093
University of California San Diego
9500 Gilman Dr, La Jolla, CA 92093