Difference between revisions of "Koushanfar2007a"
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|abstract=Many characteristics of VLSI designs, such as process variations, demonstrate strong spatial correlations. Accurately modeling of these correlated behaviors is crucial for many timing and power analyses to be valid. This paper proposes a new spatial model with a long-range trend component, a smooth correlation component, as well as a truly random component. The efficient method to construct such a spatial model is based on the Generalized Least Square fitting and the structured correlation functions, which are actually the generalization of the popular Pelgrom mismatch models. Experimental results on industrial benchmarks show that the method is not only highly effective for variability modeling, but can also be used for other spatially distributed characteristics such as IR drops and on-chip temperature distributions. | |abstract=Many characteristics of VLSI designs, such as process variations, demonstrate strong spatial correlations. Accurately modeling of these correlated behaviors is crucial for many timing and power analyses to be valid. This paper proposes a new spatial model with a long-range trend component, a smooth correlation component, as well as a truly random component. The efficient method to construct such a spatial model is based on the Generalized Least Square fitting and the structured correlation functions, which are actually the generalization of the popular Pelgrom mismatch models. Experimental results on industrial benchmarks show that the method is not only highly effective for variability modeling, but can also be used for other spatially distributed characteristics such as IR drops and on-chip temperature distributions. | ||
|pages=268 - 269 | |pages=268 - 269 | ||
|month= | |||
|year=2007 | |||
|booktitle=Design Automation Conference (DAC) | |booktitle=Design Automation Conference (DAC) | ||
|title=A general framework for spatial correlation modeling in VLSI design | |title=A general framework for spatial correlation modeling in VLSI design | ||
|entry=inproceedings | |entry=inproceedings | ||
}} | }} | ||
Revision as of 03:33, 4 September 2021
| Koushanfar2007a | |
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| author | F. Koushanfar and M. Potkonjak |
| booktitle | Design Automation Conference (DAC) |
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| pages | 268 - 269 |
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| title | A general framework for spatial correlation modeling in VLSI design |
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| year | 2007 |
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Email:
farinaz@ucsd.edu
farinaz@ucsd.edu
Address:
Electrical & Computer Engineering
University of California, San Diego
9500 Gilman Drive, MC 0407
Jacobs Hall, Room 6401
La Jolla, CA 92093-0407
Electrical & Computer Engineering
University of California, San Diego
9500 Gilman Drive, MC 0407
Jacobs Hall, Room 6401
La Jolla, CA 92093-0407
Lab Location: EBU1-2514
University of California San Diego
9500 Gilman Dr, La Jolla, CA 92093
University of California San Diego
9500 Gilman Dr, La Jolla, CA 92093