Difference between revisions of "Koushanfar2001"
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|abstract=Symbolic debuggers are system development tools that can accelerate the validation speed of behavioral specifications by allowing a user to interact with an executing code at the source level. In response to a user query, the debugger retrieves the value of a source variable in a manner consistent with respect to the source statement where execution has halted. However, when a behavioral specification has been optimized using transformations, values of variables may be inaccessible in the run-time state. We have developed a set of techniques that, given a behavioral specification CDFG, enforce computation of a selected subset Vcut of user variables such that (i) all other variables \υ鈭圕DFG can be computed from Vcut and (ii) this enforcement has minimal impact on the optimization potential of the computation. The implementation of the new debugging approach poses several optimization tasks. We have formulated the optimization tasks and developed heuristics to solve them. The effectiveness of the approach has been demonstrated on a set of benchmark designs. | |abstract=Symbolic debuggers are system development tools that can accelerate the validation speed of behavioral specifications by allowing a user to interact with an executing code at the source level. In response to a user query, the debugger retrieves the value of a source variable in a manner consistent with respect to the source statement where execution has halted. However, when a behavioral specification has been optimized using transformations, values of variables may be inaccessible in the run-time state. We have developed a set of techniques that, given a behavioral specification CDFG, enforce computation of a selected subset Vcut of user variables such that (i) all other variables \υ鈭圕DFG can be computed from Vcut and (ii) this enforcement has minimal impact on the optimization potential of the computation. The implementation of the new debugging approach poses several optimization tasks. We have formulated the optimization tasks and developed heuristics to solve them. The effectiveness of the approach has been demonstrated on a set of benchmark designs. | ||
|pages=392 - 401 | |pages=392 - 401 | ||
|month= | |||
|year=2001 | |||
|volume=20 | |volume=20 | ||
|journal=IEEE Transactions on Computer-Aided Design (DAC) | |journal=IEEE Transactions on Computer-Aided Design (DAC) | ||
|title=Symbolic debugging of embedded hardware and software | |title=Symbolic debugging of embedded hardware and software | ||
|entry=article | |entry=article | ||
}} | }} | ||
Revision as of 03:27, 4 September 2021
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| author | F. Koushanfar and D. Kirovski and I. Hong and M. Potkonjak and M.C. Papaefthymiou |
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| journal | IEEE Transactions on Computer-Aided Design (DAC) |
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| pages | 392 - 401 |
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| title | Symbolic debugging of embedded hardware and software |
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| volume | 20 |
| year | 2001 |
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Email:
farinaz@ucsd.edu
farinaz@ucsd.edu
Address:
Electrical & Computer Engineering
University of California, San Diego
9500 Gilman Drive, MC 0407
Jacobs Hall, Room 6401
La Jolla, CA 92093-0407
Electrical & Computer Engineering
University of California, San Diego
9500 Gilman Drive, MC 0407
Jacobs Hall, Room 6401
La Jolla, CA 92093-0407
Lab Location: EBU1-2514
University of California San Diego
9500 Gilman Dr, La Jolla, CA 92093
University of California San Diego
9500 Gilman Dr, La Jolla, CA 92093