We present the first approach for post-silicon leakage power reduction through input vector control (IVC) that takes into account the impact of the manufacturing variability (MV). Because of the MV, the integrated circuits (ICs) implementing one design requiredifferent input vectors to achieve their lowest leakage states. We
address two major challenges. The first is the extraction of the gatelevel characteristics of an IC by measuring only the overall leakage power for different inputs. The second problem is the rapid generation of input vectors that result in a low leakage for a large number
of unique ICs that implement a given design, but are different in
the post-manufacturing phase. Experimental results on a large set
of benchmark instances demonstrate the efficiency of the proposed methods. For example, the leakage power consumption could be reduced in average by more than 10.4%, when compared to the previously published IVC techniques that did not consider MV.