FPGA Time-Bounded Unclonable Authentication

TitleFPGA Time-Bounded Unclonable Authentication
Publication TypeConference Paper
Year of Publication2010
AuthorsMajzoobi, M., A. Elnably, and F. Koushanfar
Secondary AuthorsBöhme, R., P. Fong, and R. Safavi-Naini
Conference NameInformation Hiding
Date PublishedMay, 2010
Abstract

This paper introduces a novel technique for extracting the unique timing signatures of the FPGA configurable logic blocks in a digital form over the space of possible challenges. A new class of physical unclonable functions that enables inputs challenges such as timing, digital, and placement challenges can be built upon the delay signatures. We introduce a suite of new authentication protocols that take into account non-triviality of bitstream reverse-engineering in addition to the FPGA’s unprecedented speed in responding to challenges. Our technique is secure against various attacks and robust to fluctuations in operational conditions. Proof of concept implementation of the signature extraction and evaluations of the proposed methods are demonstrated on Xilinx Virtex 5 FPGAs. Experimental results demonstrate practicality of the proposed techniques.

URLhttp://dl.acm.org/citation.cfm?id=1929305
AttachmentSize
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